Resolving SPI bus contention

Resolving SPI bus contention


Hello, and welcome
to The Logic Minute. In today’s video,
we will explore how to resolve communication
contention on the SPI bus by using a multiplexer. The Serial Peripheral
Interface protocol, also known as the SPI
protocol, is a commonly used synchronous serial
communication protocol. It is typically used for
short-distance communication to connect multiple peripherals,
such as flash memory, sensors, ADCs, and SD cards to
hosts, such as MCUs FPGAs, and processors. The SPI protocol typically
uses four lines– two data lines consisting
of master output slave input and master input slave
output, a clock signal, and a chip select signal. Within the SPI protocol,
only one master or host can communicate to a
slave or multiple slaves at any point in time. Because of this, when
two hosts attempt to communicate on the
SPI bus at the same time, there is contention over which
host should take priority over communication. This may result in bit
errors or malfunction of the slave or slaves. As an example, an
MCU and a processor need to share access of
a single flash memory bank, which communicates
via the SPI protocol. Connecting both the
MCU and the processor to the bus at the same time
will cause bus contention. Therefore, there needs
to be an isolated connection of each host to the
bus at a given point in time. In order to achieve this,
a multiplexer, or MUX, can be added to the system. This will provide an isolated
connection of each host to the flash memory. We typically recommend a four
to six channel two to one MUX for this application. Thank you for
watching this video, and please explore the other
training material on our site. If you have any questions,
come over to the E to E forums to ask us directly.

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